Such a circuit arrangement having a load transistor T and a generally known voltage limiting circuit 10 that functions according to the principle of “active zenering” is illustrated in FIG. 1. In the example, the load transistor T is designed as an n-conducting MOSFET, the drain-source path D-S of which is connected in series with a load t between a supply potential Vbb and reference-ground potential GND. In the simplest case, the voltage limiting circuit 10 comprises a series circuit formed by at least a zener diode Z1 and a diode D1, which are connected oppositely to one another, so that one of the components Z1, D1 is always operated in the reverse direction. This series circuit is connected between the drain connection G of the transistor T, the gate connection G being connected to a drive connection IN for application of a drive signal Sin for the transistor T.
The voltage limiting circuit or protective circuit 10 connected between the drain connection D and the gate connection G of the transistor T protects the transistor in the off state from overvoltages by virtue of the circuit 10 turning the transistor T on as soon as the drain-source voltage thereof reaches a predetermined maximum value. This maximum value to which the drain-source voltage of the transistor T is clamped by the protective circuit 10 is essentially determined by the breakdown voltage of the zener diode Z1.
Circuits corresponding to the limiting circuit 10 which protect the transistor T from overvoltages are used in a targeted manner in connection with the driving of inductive loads through the load transistor T for the purpose of commutating the inductive load Z after the transistor T has turned off. After the presence of a switch-off signal at the drive connection IN, and thus at the gate connection of the transistor T, and in the event of the drain-source voltage rising, the limiting circuit 10 holds the transistor T in the on state until the load has commutated to an extent such that the load path voltage of the transistor T has fallen below the value of the clamping voltage. During this operating state, in which the overall circuit with the limiting circuit 10 and the transistor T functions in the manner of a zener diode, the energy previously stored in the inductive load Z is converted into heat in the transistor. This may lead to thermal instabilities that can overall impair the dielectric strength of the component, as is explained below.
FIG. 2 shows the transfer characteristic curve of a MOSFET that is optimized with regard to a low on resistance, in the example a MOSFET of the SPP80N06S2-05 type from Infineon Technologies AG, Munich. The illustration shows the drain current Id as a function of the gate-source voltage Vgs for two different temperatures T10=37° C. and T20=175° C. The characteristic curve reveals that at a gate-source voltage of less than a limit value Vgs0 or at currents of less than a limit value Id0, an increase in the temperature results in an increase in the current flow; a thermal positive feedback (αT>0) is thus present. It is only at gate-source voltages of greater than Vgs0 that an operating state with a thermal negative feedback (αT<0) is attained, in the case of which, given the same gate-source voltage, the current decreases as the temperature increases.
Operating the component at small currents in the region of thermal positive feedback may lead to instabilities to the effect that the current that rises in the event of rising temperatures increases the component temperature further, which in turn leads to an increase in the current and may ultimately lead to destruction of the component.
In the case of a cellularly constructed transistor having a multiplicity of identical constructed transistor cells connected in parallel, considerable current and temperature homogeneities may result on account of the effect explained above in the case of operation in the region of thermal positive feedback. In the case of such a component, the cells already heat up to different extents depending on their position in the cell array. Thus, cells in the interior of the cell array usually heat up to a greater extent than cells in the edge region of the cell array, owing to the poorer heat dissipation. In the event of thermal positive feedback, cells that lie in a region of higher temperature accept a greater proportion of the load current that flows, which in turn leads to a further increase in temperature in this region of the cell array and to a further increase in current until destruction of individual cells and thus of the component occurs, while the temperature or current loading of other cells of the cell array may still be far from a destructive loading.
Such problems can be avoided by always choosing the gate-source voltage with a magnitude such that the component is not operated in the operating state of thermal positive feedback, but rather is always operated in conjunction with thermal negative feedback in which a rising temperature brings about a reduction of the current that flows. When using such a transistor in the circuit with a voltage limiting circuit 10 as illustrated in FIG. 1, however, such an operating state cannot always be ensured since the gate-source voltage is set by the clamping circuit 10 in a manner dependent on the voltage conditions in the load path of the transistor T. In the event of a relatively lengthy overvoltage across the transistor, the transistor is operated in the region of thermal positive feedback at least during the switch-on and before the switch-off, which may lead to destruction of the component.